Title :
Low power balun Design for 1.575 GHz in 90 nm CMOS rechnology
Author_Institution :
Inst. of Microelectron. & Optoelectron., Warsaw Univ. of Technol., Warsaw, Poland
Abstract :
In this paper low power balun design is presented. It is optimized for 1.575 GHz and designed in 90 nm UMC CMOS technology. Current consumption is only 0.44 mA under 1.2 V supply voltage. The simulation shows that gain and phase imbalance are equal to 0.08 dB and 0.045°, respectively. Single-ended power gain of this circuit is 2.2 dB. A special dimension matching has been made to minimize circuit susceptibility to variation of the manufacturing process.
Keywords :
CMOS integrated circuits; baluns; low-power electronics; CMOS technology; circuit susceptibility; current 0.44 mA; dimension matching; frequency 1.575 GHz; gain 2.2 dB; gain imbalance; low power balun design; phase imbalance; single-ended power gain; size 90 nm; voltage 1.2 V; Gain; Impedance matching; Mixers; Power demand; Receivers; Resistance; Transistors; Balun; CMOS; GPS; RFIC; UMC 90 nm; low power; phase splitter;
Conference_Titel :
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2012 IEEE 15th International Symposium on
Conference_Location :
Tallinn
Print_ISBN :
978-1-4673-1187-8
Electronic_ISBN :
978-1-4673-1186-1
DOI :
10.1109/DDECS.2012.6219067
