Predictive tolerance and sensitivity analysis based on parametric response surface methodology

An innovative methodology aimed at deriving predictive response surface models for the variability of VLSI mixed-signal basic building block performances is explored in this paper. The purpose of this methodology is two-fold. First, we plan to be able to predict the sensitivity to process variations of basic ingredients of VLSI design, such as embedded memories, full custom and analog components. This can greatly enhance the capability of concurrently developing process, device, and circuit design, which is considered to be a key factor for system-on-chip designs. Secondly, the availability of parameterized process variability predictors together with functional macromodels of basic circuit components is the basis for top-down design and manufacturability analysis and optimization of large analog and mixed signal sub-systems. In our experiment, we studied the propagation delay and the power dissipation of an SRAM sense amplifier which has been characterized for three different state-of-the-art CMOS technologies, with 0.35, 0.25, and 0.18 μm minimum gate length. We propose use of the response surface methodology (RSM) to compute performance sensitivities to low-level parameters. Finally, we use a sensitivity analysis to investigate the potential for technology-independent (i.e. parameterized) macromodels to be used in efficient hierarchical statistical analysis