Efficient yield estimation within automated analog IC design

A new statistical design methodology is presented that uses symbolic methods to increase the efficiency of statistical IC design. The methodology is implemented in an environment that combines the symbolic design equation manipulation engine DONALD with the generic statistical design system GOSSIP. DONALD is used to generate the initial design and to create the symbolic computational plan that is used by GOSSIP for the actual statistical yield, Cp and Cpk optimization, where Cp, Cpk are process capability indices. The strengths and weaknesses of the proposed approach are discussed, and its accuracy and speed are compared with the traditional method of using a SPICE-type circuit simulator in the inner loop of the statistical optimization. Overall, a significant speed-up of the statistical IC design efficiency is observed