DocumentCode :
2335
Title :
An Efficient SRAM Yield Analysis and Optimization Method With Adaptive Online Surrogate Modeling
Author :
Jian Yao ; Zuochang Ye ; Yan Wang
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Volume :
23
Issue :
7
fYear :
2015
fDate :
Jul-15
Firstpage :
1245
Lastpage :
1253
Abstract :
SRAM cells usually require extremely low failure rate or equivalently extremely high production yield, making it impractical to perform yield analysis using Monte Carlo (MC) method as huge amount of samples are needed. Fast MC methods, e.g., importance sampling methods, are still too expensive as the anticipated failure rate is very low. In this paper, a new SRAM yield analysis method is proposed to tackle this issue. The key idea is to improve traditional importance sampling method with an efficient online surrogate model. Experimental results show that the proposed yield analysis method achieves $5times $ -$22times $ speedup over existing state-of-the-art techniques without sacrificing estimation accuracy. Sigma distribution and schmoo plot can be quickly generated by the proposed method, which is very useful for realistic applications. Based on the proposed yield analysis method, an efficient yield optimization method has been developed to further automate the SRAM cell design procedure where process variations can be fully considered. Experimental results show that a fully automatic yield optimization for SRAM cells can be done within only a few hours.
Keywords :
SRAM chips; circuit optimisation; failure analysis; importance sampling; integrated circuit design; integrated circuit modelling; integrated circuit reliability; Monte Carlo method; SRAM cell design procedure; SRAM optimization method; SRAM yield analysis method; Sigma distribution; adaptive online surrogate modeling; fast MC method; importance sampling methods; low failure rate; process variations; schmoo plot; Computational modeling; Integrated circuit modeling; Monte Carlo methods; Optimization methods; Random access memory; Training; Failure rate; SRAM; importance sampling; optimization; process variations; statistical analysis; surrogate model; yield;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2014.2336851
Filename :
6867392
Link To Document :
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