• DocumentCode
    2335074
  • Title

    On-chip aging sensor to monitor NBTI effect in nano-scale SRAM

  • Author

    Ceratti, A. ; Copetti, T. ; Bolzani, L. ; Vargas, F.

  • Author_Institution
    Catholic Univ. of Rio Grande do Sul (PUCRS), Porto Alegre, Brazil
  • fYear
    2012
  • fDate
    18-20 April 2012
  • Firstpage
    354
  • Lastpage
    359
  • Abstract
    Today, the increasing need to store more and more information has resulted in the fact that Static Random Access Memories (SRAMs) occupy the greatest part of a System-on-Chip (SoC). Therefore, SRAM´s robustness is considered crucial in order to guarantee the reliability of such SoCs over lifetime. In this context, one of the most important phenomena that degrades Nano-scale SRAMs reliability is related to Negative-Bias Temperature Instability (NBTI), which accelerates memory cells aging. This paper proposes a new approach to detect SRAM aging during system lifetime based on an On-Chip Aging Sensor (OCAS). The OCAS is able to detect any specific aging state of a cell in the SRAM array. The strategy is based on the connection of one OCAS every SRAM column, each periodically performing off-line tests by monitoring the write operations on the SRAM cells in order to detect aging. To prevent the OCAS from aging and from dissipating leakage power, the OCAS circuitry is powered-off during its idle periods. Experimental results demonstrate the sensor´s high sensitivity to detect early aging states and therefore, guaranteeing high memory reliability. Finally, the area overhead related to the sensors´ insertion is almost negligible.
  • Keywords
    SRAM chips; ageing; integrated circuit reliability; integrated circuit testing; nanoelectronics; sensors; system-on-chip; NBTI effect monitoring; OCAS circuitry; SRAM array; SoC reliability; aging state detection; leakage power dissipation; memory reliability; nanoscale SRAM reliability; negative-bias temperature instability; off-line tests; on-chip aging sensor; static random access memories; system lifetime; system-on-chip; Aging; Monitoring; Random access memory; Reliability; System-on-a-chip; Testing; Transistors; Aging; NBTI; Nano-scale SRAM; On-Chip Aging Sensor; SRAM reliability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2012 IEEE 15th International Symposium on
  • Conference_Location
    Tallinn
  • Print_ISBN
    978-1-4673-1187-8
  • Electronic_ISBN
    978-1-4673-1186-1
  • Type

    conf

  • DOI
    10.1109/DDECS.2012.6219087
  • Filename
    6219087