DocumentCode :
233588
Title :
Action Synthesis for Branching Time Logic: Theory and Applications
Author :
Knapik, Michal ; Meski, Artur ; Penczek, Wojciech
Author_Institution :
Inst. of Comput. Sci., Warsaw, Poland
fYear :
2014
fDate :
23-27 June 2014
Firstpage :
1
Lastpage :
10
Abstract :
We introduce a parametric extension of Action-Restricted Computation Tree Logic. A symbolic fixed-point algorithm providing a solution to the exhaustive parameter synthesis problem is proposed. The parametric approach allows for an in-depth system analysis and synthesis of correct parameter values. The time complexity of the problem and of the algorithm is provided. The prototype tool SPATULA, implementing the algorithm, is applied to the analysis of three benchmarks: faulty Train-Gate-Controller, Peterson´s Mutual Exclusion Protocol, and a Generic Pipeline Processing network. The experimental results show efficiency and scalability of our approach in comparison with a naive solution to the problem.
Keywords :
computational complexity; formal logic; Peterson mutual exclusion protocol; SPATULA; action synthesis; action-restricted computation tree logic; branching time logic; exhaustive parameter synthesis problem; faulty train-gate-controller; generic pipeline processing network; symbolic fixed-point algorithm; time complexity; Algorithm design and analysis; Complexity theory; Computational modeling; Context; Cost accounting; Semantics; Syntactics; model checking; parameter synthesis; parametric model checking; parametric verification;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application of Concurrency to System Design (ACSD), 2014 14th International Conference on
Conference_Location :
Tunis La Marsa
Type :
conf
DOI :
10.1109/ACSD.2014.22
Filename :
7016323
Link To Document :
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