DocumentCode :
2337056
Title :
Study on High Throughput Turbo Decoder
Author :
Choi, Jaesung ; Lee, Jeong Woo
Author_Institution :
Sch. of Electr. & Electron. Eng., Chung-Ang Univ., Seoul, South Korea
fYear :
2011
fDate :
15-18 May 2011
Firstpage :
1
Lastpage :
5
Abstract :
Turbo codes have outstanding error correction performance. However, the implementations of the iterative turbo decoder require substantial memory and incur a long latency which cannot be tolerated in some applications. In this paper, various kinds of high throughput turbo decoding schemes are introduced, and we propose a new turbo decoding scheme that using the advantages of each scheme. The proposed scheme is basically based on the sliding window, double flow and shuffled turbo decoding scheme. Simulation results show that the proposed scheme offers good BER performance with less clock cycles per iteration than existing turbo decoding schemes. We also show that the required memories can be reduced by adjusting the size of window properly.
Keywords :
error correction codes; error statistics; iterative decoding; maximum likelihood decoding; turbo codes; BER performance; error correction performance; high throughput turbo decoder; iterative turbo decoder; turbo codes; turbo decoding; Bit error rate; Decoding; Iterative decoding; Measurement; Memory management; Throughput; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Vehicular Technology Conference (VTC Spring), 2011 IEEE 73rd
Conference_Location :
Yokohama
ISSN :
1550-2252
Print_ISBN :
978-1-4244-8332-7
Type :
conf
DOI :
10.1109/VETECS.2011.5956697
Filename :
5956697
Link To Document :
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