Author :
Suetsugu, Tadashi ; Oyama, Naoki ; Kuga, Shotaro ; Taromaru, Makoto ; Xiuqin Wei
Author_Institution :
Dept. of Electron. Eng. & Comput. Sci., Fukuoka Univ., Fukuoka, Japan
Abstract :
The EER (Envelope Elimination and Restoration) architecture is high efficient power control method for high frequency power amplifiers. The EER architecture has a feature of high efficiency operation for the high PAPR system such as QAM and OFDM. However, due to slow transient attenuation of the tuned power amplifiers, actual EER system cannot achieve expected power level and efficiency. In order to improve this problem, EPWM architecture was introduced for the switching power amplifiers. However, EPWM architecture had a problem of high peak switch voltage and low power efficiency. In the author´s previous research, EPWM-EER architecture which combines EER and EPWM architecture was introduced. In the EPWM-EER architecture, peak switch voltage was as low as EER architecture. And transient response was as fast as EPWM architecture. Therefore, EPWM-EER architecture takes over features of both EER and EPWM. However, EPWM architecture (not EPWM-EER) had a drawback that transient response in the falling time is as slow as EER. This drawback was taken over by the EPWM-EER architecture, and EPWM EER architecture also had a drawback that transient response in the falling time was slow as EER. In this paper, improved EPWM-EER architecture which accelerates transient response in the falling time is proposed. This method only shifts switching instance of EPWM-EER architecture, so circuit configuration is same as EPWM-EER architecture. With this improved EPWM-EER architecture, which, in this paper, referred to as pEPWM (Psuedo-EPWM or Preceding EPWM), peak switch voltage becomes slightly higher than EER architecture. However, transient response in the falling time becomes as fast as tha of rising time of EPWM architecture. Therefore, the improved EPWM-EER architecture (pEPWM) has features of almost lowest peak switch voltage, fastest rising time response, and fastest falling time response among EER, EPWM, EPWM-EER, and pEPWM.
Keywords :
integrated circuit design; power amplifiers; power control; transient response; EER system; EPWM-EER architecture; class E amplifiers; envelope elimination and restoration; fast transient response; high efficient power control method; high frequency power amplifiers; peak switch voltage; switching power amplifiers; Attenuation; Computer architecture; Pulse width modulation; Surges; Switches; Transient analysis; Transient response;