Title :
An Adaptive Inductorless Continuous Time Equalizer for Gigabit Links in 0.13 um CMOS
Author :
Monga, Sushrant ; Chatterjee, Saptarshi
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, New Delhi, India
Abstract :
A multi-gigabit inductor-less wide-range adaptive continuous time equalizer (CTE) architecture is presented. The incoming data stream is equalized using one-bit post-cursor clock-less dynamic feedback. The circuit adapts to a given link environment (noisy channel and the termination) by controlling the amount of feedback and thereby defining the high-frequency and low-frequency response. The architecture is scalable to higher speeds with technology. The circuit can be operated in different modes based on the attenuation in the input signal at a given operating frequency. Measurement results depict the successful equalization of channels having an attenuation of up to -19 dB at 10 GHz. The circuit is fabricated in 0.13 μm CMOS technology and consumes a current of 39 mA (max.) at (Vdd = 1.32 V) in the low power mode.
Keywords :
CMOS integrated circuits; adaptive equalisers; feedback; CMOS; Gigabit Links; current 39 mA; data stream; frequency 10 GHz; high-frequency response; input signal attenuation; low-frequency response; multigigabit inductor-less wide-range adaptive continuous time equalizer architecture; one-bit post-cursor clock-less dynamic feedback; size 0.13 mum; voltage 1.32 V; CMOS integrated circuits; Decision feedback equalizers; Feedback loop; Gain; Impedance; Transconductance; Gbps; continuous time equalizer; decision feedback; frequency response; serial link receiver;
Conference_Titel :
VLSI Design and 2014 13th International Conference on Embedded Systems, 2014 27th International Conference on
Conference_Location :
Mumbai
DOI :
10.1109/VLSID.2014.84