DocumentCode
2340
Title
Smooth Bosch Etch for Improved Si Diodes
Author
Voss, L.F. ; Qinghui Shao ; Conway, A.M. ; Reinhardt, C.E. ; Graff, R.T. ; Nikolic, R.J.
Author_Institution
Lawrence Livermore Nat. Lab., Livermore, CA, USA
Volume
34
Issue
10
fYear
2013
fDate
Oct. 2013
Firstpage
1226
Lastpage
1228
Abstract
A modified Bosch process is used to reduce leakage current resulting from surface damage and roughness for high aspect ratio pillars fabricated from Si p-i-n structures. C4F8 is used during both the etch and passivation steps to achieve a scallop-free and vertical structure. A 5× decrease in both the reverse bias leakage current and corresponding improvement in effective carrier density, charge density, depletion width, and minority carrier lifetime are observed using this process, indicating that surface charge states are decreased using this process. This can impact a number of 3-D next-generation devices.
Keywords
etching; leakage currents; p-i-n diodes; 3D next generation devices; Si; Si diodes; high aspect ratio pillars; leakage current; p-i-n structures; passivation steps; smooth Bosch etch; Charge carrier density; Etching; Leakage currents; Passivation; Silicon; Standards; Diode; etch; silicon;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2013.2278374
Filename
6594867
Link To Document