Title :
On the modulo 2n+1 multiplication for diminished-1 operands
Author :
Efstathiou, C. ; Voyiatzis, I. ; Sklavos, N.
Author_Institution :
Dept. of Inf., TEI of Athens, Athens
Abstract :
In this work we propose an enhancement to one of the most efficient modulo 2n +1 multipliers for diminished-1 operands already published. This improvement is achieved by reducing the partial products from n + 3 to n +1 . The derived partial products are reduced by a tree carry save adder architecture to two operands, which are finally added by a modulo 2n +1 diminished-1 adder. Our multipliers compared to existing implementations offer enhanced operation speed and have reduced area complexity.
Keywords :
adders; carry logic; multiplying circuits; 2n+1 multiplication; diminished-1 operands; partial products; tree carry save adder architecture; Adders; Circuits and systems; Costs; Cryptography; Delay; Digital arithmetic; Educational technology; Encoding; Hardware; Informatics;
Conference_Titel :
Signals, Circuits and Systems, 2008. SCS 2008. 2nd International Conference on
Conference_Location :
Monastir
Print_ISBN :
978-1-4244-2627-0
Electronic_ISBN :
978-1-4244-2628-7
DOI :
10.1109/ICSCS.2008.4746907
