On hardware implementation of DCT/IDCT for image processing

Most studies on standards of image and video compression demonstrated the need to rely on hardware accelerator for the most computationally intensive part of the coding process that is the discrete cosine transform (DCT). In this paper, a material implementation of discrete cosine transform (DCT) and inverse DCT (IDCT) was presented, in the goal to reduce execution time and chip size. Also to achieve time to market (TTM), we had used DCT and IDCT from Xilinx IP. This implementation based Memec Virtex 2 pro platform is supported as being a material accelerator for image and video compression standards. The experimental results show optimization in processing time offered by material acceleration vs. software implementation.