A novel method for RTP low temperature monitor

In CMOS ULSI circuits, chip size reduction through shrinking of design rules and device scaling place an increasing demand on tolerable limits of interconnection resistance. As the industry search for a better substitute, cobalt salicide was found distinctively promising. The temperature (450∼540°C) of CoSi₂ formation is generally far lower than that (650∼750°C) of TiSi₂ formation at the first anneal step. In this paper, a novel RTP (Rapid Thermal Processing) low temperature (500∼540°C) monitor method using thermal wave (TW) change concept has been developed. When a fixed thermal budget is applied, it produces a fixed thermal wave change. We described the linear relationship between RTP temperature and thermal wave change. For this study, we performed its coefficient can reach above 0.95 and excellent run-to-run repeatability (<1.1% for 1-σ) can be achieved with optimized implant condition and RTP anneal recipe.