DocumentCode
2342434
Title
Stress release for shallow trench isolation by single-wafer, rapid-thermal steam oxidation
Author
Luoh, T. ; Chen, C.S. ; Yang, L.W. ; Shih, H.H. ; Chen, K.C. ; Hsueh, C. ; Chung, H. ; Pan, S. ; Lu, C.Y.
fYear
2002
fDate
2002
Firstpage
111
Lastpage
118
Abstract
Shallow trench isolation (STI) is the predominant isolation technology for advanced integrated circuits. Dislocations are often found at STI after repeated thermal cycles. For STI integrity, it is insufficient to have excellent STI patterning fidelity and rounded corners; it is also critical to have minimal thermal mismatch during oxidation and dislocation-free high-temperature annealing. Single-wafer, rapid-thermal steam oxide is found to be an excellent candidate for STI liner oxide and sacrificial oxide in that it provides lower thermal budget, rounded top and bottom corners, and significant improvement in stress release, the mechanism of which is also presented.
Keywords
VLSI; dislocations; internal stresses; isolation technology; oxidation; rapid thermal processing; steam; stress relaxation; STI; STI integrity; STI liner oxide; STI patterning fidelity; dislocation-free high-temperature annealing; dislocations; integrated circuits; isolation technology; minimal thermal mismatch; repeated thermal cycles; rounded bottom corners; rounded corners; rounded top corners; sacrificial oxide; shallow trench isolation; single-wafer rapid-thermal steam oxidation; stress release; thermal budget; Capacitive sensors; Furnaces; Isolation technology; Oxidation; Plastics; Residual stresses; Silicon; Tensile stress; Thermal stresses; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Thermal Processing of Semiconductors, 2002. RTP 2002. 10th IEEE International Conference of
Print_ISBN
0-7803-7465-7
Type
conf
DOI
10.1109/RTP.2002.1039448
Filename
1039448
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