• DocumentCode
    2342819
  • Title

    DFT for high-quality low cost manufacturing test

  • Author

    Rajski, Janusz

  • fYear
    2001
  • fDate
    2001
  • Firstpage
    3
  • Lastpage
    8
  • Abstract
    The semiconductor industry is capable of building "tester-limited fabs" and definitely needs a more cost-effective solution for the cost of test problem than the one we have today. The solutions are likely, to come from several different sources. While the ATE industry is addressing the cost of test problem by designing new DFT testers, it is the EDA industry that holds the key to providing an embedded test solution that guarantees high-quality, low cost manufacturing test. In this presentation we examine various DFT technologies and their ability to provide high quality low cost manufacturing test
  • Keywords
    automatic test equipment; design for testability; integrated circuit economics; production testing; ATE industry; DFT; IC manufacturing; embedded test solution; high-quality test; low cost manufacturing test; semiconductor industry; tester-limited fabs; Conductors; Costs; Design for testability; Electronic design automation and methodology; Electronics industry; Logic testing; Manufacturing industries; Semiconductor device manufacture; Semiconductor device testing; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 2001. Proceedings. 10th Asian
  • Conference_Location
    Kyoto
  • ISSN
    1081-7735
  • Print_ISBN
    0-7695-1378-6
  • Type

    conf

  • DOI
    10.1109/ATS.2001.990250
  • Filename
    990250