A Reconfigurable Processor for the Cryptographic nT Pairing in Characteristic 3

Author

Ronan, Robert ; hEigeartaigh, C.O. ; Murphy, Colin ; Kerins, Tim ; Barretto, Paulo S L M

Author_Institution

Dept. of Electr. Eng., Univ. Coll. Cork

fYear

2007

fDate

2-4 April 2007

Firstpage

11

Lastpage

16

Abstract

Recently, there have been many proposals for secure and novel cryptographic protocols that are built on bilinear pairings. The eta _T pairing is one such pairing and is closely related to the Tate pairing. In this paper we consider the efficient hardware implementation of this pairing in characteristic 3. All characteristic 3 operations required to compute the pairing are outlined in detail. An efficient, flexible and reconfigurable processor for the eta_T pairing in characteristic 3 is presented and discussed. The processor can easily be tailored for a low area implementation, for a high throughput implementation, or for a balance between the two. Results are provided for various configurations of the processor when implemented over the field F₃₉₇ on an FPGA

Keywords

cryptographic protocols; microprocessor chips; bilinear pairing; cryptographic eta_T pairing; cryptographic protocol; reconfigurable processor; Arithmetic; Cryptographic protocols; Elliptic curve cryptography; Elliptic curves; Field programmable gate arrays; Hardware; Identity-based encryption; Iterative algorithms; Proposals; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Information Technology, 2007. ITNG '07. Fourth International Conference on

Conference_Location

Las Vegas, NV

Print_ISBN

0-7695-2776-0

Type

conf

DOI

10.1109/ITNG.2007.19

Filename

4151653