DocumentCode
2342891
Title
Detecting unique faults in multi-port SRAMs
Author
Hamdioui, Said ; Van de Goor, Ad J. ; Eastwick, David ; Rodgers, Mike
Author_Institution
Intel Corp., Santa Clara, CA, USA
fYear
2001
fDate
2001
Firstpage
37
Lastpage
42
Abstract
This paper begins with a brief overview of realistic fault models for multi-port SRAMs with p ports, divided into p classes: single-port faults, two-port faults,..., p-port faults. Except for single-port faults, all other fault classes cannot be detected with the conventional (single-port) memory tests; they require special tests. Next, the paper presents a set of three linear single-addressing tests for unique multi-port memory faults (p > 2) that will be merged into a single test
Keywords
SRAM chips; fault diagnosis; fault simulation; integrated circuit testing; multiport networks; fault classes; fault models; linear single-addressing tests; multi-port SRAMs; p-port faults; single-port faults; two-port faults; unique faults; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Educational institutions; Fault detection; Information technology; Interference; Random access memory; SPICE;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2001. Proceedings. 10th Asian
Conference_Location
Kyoto
ISSN
1081-7735
Print_ISBN
0-7695-1378-6
Type
conf
DOI
10.1109/ATS.2001.990256
Filename
990256
Link To Document