DocumentCode
2343307
Title
On the definition of critical areas for IC photolithographic spot defects
Author
De Gyvez, Jose Pineda ; Jess, J.A.G.
Author_Institution
Dept. of Electr. Eng., Eindhoven Univ. of Technol., Netherlands
fYear
1989
fDate
12-14 Apr 1989
Firstpage
152
Lastpage
158
Abstract
The model presented is a generalization of existing theory. The sensitive areas are a function of the geometrical patterns in the layers, their electrical significance, their relationship to patterns in other layers, and the defect size. Identifying composite sensitive areas makes it possible to predict the probability of failure of special structures such as transistors and capacitors, which in turn eases the problem of predicting accurately and realistically the circuit design yield with respect to photolithographic defects. Two general expressions are developed to find the critical areas for extra and missing materials. The approach followed makes use of `safe extend´ factors which must be set independently for each structure with an electrical significance in the layout
Keywords
fault location; integrated circuit technology; integrated circuit testing; photolithography; probability; semiconductor technology; IC photolithographic spot defects; VLSI; capacitors; composite sensitive areas; critical areas; geometrical patterns; model; probability; transistors; CMOS process; Circuit faults; Conductors; Connectors; Degradation; Integrated circuit interconnections; Integrated circuit modeling; MOS devices; Predictive models; Solid modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
European Test Conference, 1989., Proceedings of the 1st
Conference_Location
Paris
Print_ISBN
0-8186-1937-6
Type
conf
DOI
10.1109/ETC.1989.36237
Filename
36237
Link To Document