• DocumentCode
    2343818
  • Title

    Positive Davio-based synthesis algorithm for reversible logic

  • Author

    Pang, Yu ; Wang, Shaoquan ; He, Zhilong ; Lin, Jinzhao ; Sultana, Sayeeda ; Radecka, Katarzyna

  • Author_Institution
    Coll. of Electron. Eng., Chongqing Univ. of Posts & Telecommun., Chongqing, China
  • fYear
    2011
  • fDate
    9-12 Oct. 2011
  • Firstpage
    212
  • Lastpage
    218
  • Abstract
    Reversible logic is a key technique for quantum computing so leading to low-power designs. However, current synthesis algorithms for reversible circuits are low efficiency and do not obtain optimized reversible circuits, so they are only applied to small logic functions. In this paper, we propose a new method based on positive Davio expansion to synthesize reversible circuits, which generates a positive Davio decision diagram for a logic function and transfers diagram nodes to reversible circuits. The algorithm has advantages of optimizing area and fast synthesis speed compared to BDD (Binary decision diagram) based and RM (Reed-Muller) based synthesis method, so it can be adapted for large functions.
  • Keywords
    decision diagrams; logic design; network synthesis; quantum computing; diagram node; low-power design; positive Davio decision diagram; positive Davio-based synthesis algorithm; quantum computing; reversible circuit synthesis; reversible logic; Algorithm design and analysis; Circuit synthesis; Complexity theory; Data structures; Logic functions; Logic gates; Decision diagrams; Positive Davio expansion; Reversible logic; Synthesis; Toffoli gate;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design (ICCD), 2011 IEEE 29th International Conference on
  • Conference_Location
    Amherst, MA
  • ISSN
    1063-6404
  • Print_ISBN
    978-1-4577-1953-0
  • Type

    conf

  • DOI
    10.1109/ICCD.2011.6081399
  • Filename
    6081399