Author_Institution :
Semicond. Co., Toshiba Corp., Kawasaki, Japan
Abstract :
TX7901 is an ASSP which includes TX79 processor core and many IPs. All blocks are synthesizable and flip flop based designs. TX7901 is developed by tiling design methodology to get quick turn around time. Chip size is 59mm2 with 0.18μm, 6-layer metal process. Major DFT features are scan and direct memory test. Most logic portions are scannable. direct memory test covers all memory arrays
Keywords :
application specific integrated circuits; boundary scan testing; cellular arrays; design for testability; flip-flops; integrated circuit testing; 0.18 micron; ASSP; TX79 processor core; TX7901 DFT; direct memory test; flip flop based design; logic portions; memory arrays; scan test; turn around time; Bridges; Design methodology; Frequency measurement; Logic; Microprocessors; Reduced instruction set computing; Testing; Timing;
Conference_Titel :
Test Symposium, 2001. Proceedings. 10th Asian
Conference_Location :
Kyoto
Print_ISBN :
0-7695-1378-6
DOI :
10.1109/ATS.2001.990328
