DocumentCode
2344436
Title
Analysis of on-chip interconnection network interface reliability in multicore systems
Author
Zou, Yong ; Xiang, Yi ; Pasricha, Sudeep
Author_Institution
Colorado State Univ., Fort Collins, CO, USA
fYear
2011
fDate
9-12 Oct. 2011
Firstpage
427
Lastpage
428
Abstract
In Networks-on-Chip (NoC), with ever-increasing complexity and technology scaling, transient single-event upsets (SEUs) have become a key design challenge. In this work, we extend the concept of architectural vulnerability factor (AVF) from the microprocessor domain and propose a network vulnerability factor (NVF) to characterize the susceptibility of NoC components such as the Network Interface (NI) to transient faults. Our studies reveal that different NI buffers behave quite differently on transient faults and each buffer can have different levels of inherent fault-tolerant capability. Our analysis also considers the impact of thermal hotspot mitigation techniques such as frequency throttling on the NVF estimation.
Keywords
fault tolerant computing; microprocessor chips; multiprocessing systems; multiprocessor interconnection networks; network-on-chip; transient analysis; architectural vulnerability factor; fault-tolerant capability; frequency throttling; microprocessor domain; multicore system; network vulnerability factor estimation; networks-on-chip; on-chip interconnection network interface reliability; technology scaling; thermal hotspot mitigation; transient single-event upsets; Estimation; Fault tolerance; Fault tolerant systems; Nickel; Process control; Protocols; Transient analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design (ICCD), 2011 IEEE 29th International Conference on
Conference_Location
Amherst, MA
ISSN
1063-6404
Print_ISBN
978-1-4577-1953-0
Type
conf
DOI
10.1109/ICCD.2011.6081433
Filename
6081433
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