DocumentCode :
2344711
Title :
Static window addition: A new paradigm for the design of variable latency adders
Author :
Du, Kai ; Varman, Peter ; Mohanram, Kartik
Author_Institution :
Dept. of Electr. & Comput. Eng., Rice Univ., Houston, TX, USA
fYear :
2011
fDate :
9-12 Oct. 2011
Firstpage :
455
Lastpage :
456
Abstract :
Speculative adders have attracted strong interest for achieving sublogarithmic delays by exploiting the tradeoffs between correctness and performance. Speculative adders also find use in the design of error-free variable latency adders, which combine speculation with error correction to achieve high performance for low area overhead over traditional adders. This paper describes static window addition (SWA), a novel function speculation technique for the design of low overhead, high performance variable latency adders. Analytical models for the error rate of SWA-based speculative adders are developed to facilitate both design exploration and convergence. We show that on average, variable latency addition using SWA-based speculative adders is 10% faster than the fastest DesignWare adder with area requirements of -5 to 40% for different adder widths.
Keywords :
adders; error statistics; SWA-based speculative adder; convergence; design exploration; error correction; error rate; static window addition; sublogarithmic delay; variable latency adder; Adders; Analytical models; Delay; Design automation; Error analysis; Logic functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design (ICCD), 2011 IEEE 29th International Conference on
Conference_Location :
Amherst, MA
ISSN :
1063-6404
Print_ISBN :
978-1-4577-1953-0
Type :
conf
DOI :
10.1109/ICCD.2011.6081446
Filename :
6081446
Link To Document :
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