DocumentCode
2344718
Title
Internal ESD transients in input protection circuits
Author
Fong, Y. ; Hu, C.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fYear
1989
fDate
11-13 Apr 1989
Firstpage
77
Lastpage
81
Abstract
The operation of a popular thick-field-device/grounded-gate transistor combination input protection circuit under electrostatic-discharge (ESD) stress is studied using a special test circuit. By monitoring internal voltages and currents, it was possible to observe how each element in the protection circuit contributed to the overall ESD protection. By means of the special test circuit it was determined that no degradation of the first gate-oxide transistor took place under ESD stress
Keywords
MOS integrated circuits; electrostatic discharge; integrated circuit technology; protection; transients; ESD protection; electrostatic-discharge; input protection circuits; internal ESD transients; internal currents; internal voltages; test circuit; thick-field-device/grounded-gate transistor; Bonding; Circuit testing; Degradation; Diodes; Electrostatic discharge; Inverters; Protection; Resistors; Stress; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 1989. 27th Annual Proceedings., International
Conference_Location
Phoenix, AZ
Type
conf
DOI
10.1109/RELPHY.1989.36321
Filename
36321
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