DocumentCode :
2344955
Title :
On the Physicl Layout of PRDT-Based NoCs
Author :
Yang, Guoqiang ; Yang, Mei ; Yang, Yulu ; Jiang, Yingtao
Author_Institution :
Dept. of Comput. Sci., Nankai Univ., Tianjin
fYear :
2007
fDate :
2-4 April 2007
Firstpage :
729
Lastpage :
733
Abstract :
In this paper, we present PRDT(2, 1), a new interconnection network topology for network-on-chip (NoC) design. PRDT(2,1) features a recursive structure, and has small diameter and average distance. We then focus our study on physical layout issues pertaining to PRDT(2, 1). Specifically, we show that the minimum number of metal layers required for the placement and routing in a PRDT (2, 1)-based NoC is 2. We further demonstrate that the routing channel widths can be dramatically reduced when more layers are available for layout purposes. This study confirms that PRDT(2, 1) is a practical and promising topology for on-chip interconnection networks
Keywords :
integrated circuit layout; logic design; multiprocessor interconnection networks; network routing; network topology; network-on-chip; interconnection network topology; network-on-chip design; physical layout; rotational diagonal torus; routing channel; Energy consumption; Multiprocessor interconnection networks; Network topology; Network-on-a-chip; Routing; Scalability; System-on-a-chip; Tiles; Very large scale integration; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Technology, 2007. ITNG '07. Fourth International Conference on
Conference_Location :
Las Vegas, NV
Print_ISBN :
0-7695-2776-0
Type :
conf
DOI :
10.1109/ITNG.2007.143
Filename :
4151768
Link To Document :
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