A fully programmable CMOS block matrix transform imager architecture

Author

Bandyopadhyay, Abhishek ; Hasler, Paul

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

fYear

2003

fDate

21-24 Sept. 2003

Firstpage

189

Lastpage

192

Abstract

In this paper, we introduce our CMOS block matrix transform imager architecture (MATIA). This imager is capable of performing programmable matrix operations on an image. The imager architecture is both modular and programmable. The pixel used in this architecture performs matrix multiplication while maintaining a high fill-factor (46%), comparable to active pixel sensors. Floating gates are used to store the arbitrary matrix coefficients on-chip. The chip operates in the subthreshold domain and thus has low power consumption (0.23 mW).

Keywords

CMOS image sensors; image processing; integrated circuit design; matrix algebra; programmable circuits; transforms; 0.23 mW; CMOS imager; MATIA; block matrix transform imager architecture; floating gates; image programmable matrix operations; matrix coefficients; pixel fill-factor; subthreshold domain operation; Biology computing; CMOS image sensors; CMOS process; CMOS technology; Circuits; Computer architecture; Electrons; Energy consumption; Space technology; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003

Print_ISBN

0-7803-7842-3

Type

conf

DOI

10.1109/CICC.2003.1249388

Filename

1249388

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2345346