DocumentCode :
2345347
Title :
Vlsi implementation of an entropy encoder for H.264/AVC baseline
Author :
Lu, WeiJun ; Li, Ying ; Yu, Dunshan ; Zhang, Xing
Author_Institution :
Dept. of Microelectron., Peking Univ., Beijing
fYear :
2008
fDate :
3-5 June 2008
Firstpage :
1422
Lastpage :
1425
Abstract :
In this paper, we implement a complete entropy encoder for H.264/AVC baseline profile composed of a CAVLC unit, an Exp-Golomb coding unit and a bit stream packer which can pack the bit stream in format of network abstraction layer (NAL). The encoder is implemented with SYNOPSYS Design Compiler and SMIC 0.18 um cell library. The result shows that our design costs less area than the prior work in (Tung-Chien Chen, 2005) and it can work at frequency up to 200 MHZ. In the worst case, it takes 1905 circles to encode a macro block and can process 1844 QCIF (176 x 144) frames per second.
Keywords :
VLSI; entropy codes; variable length codes; video codecs; video coding; CAVLC unit; Exp-Golomb coding unit; H.264/AVC baseline; VLSI implementation; bit stream packer; context-adaptive variable-length coding; entropy encoder; network abstraction layer; size 0.18 mum; Automatic voltage control; Costs; Entropy coding; Frequency; Hardware; Libraries; MPEG 4 Standard; Microelectronics; Very large scale integration; Video coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Electronics and Applications, 2008. ICIEA 2008. 3rd IEEE Conference on
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-1717-9
Electronic_ISBN :
978-1-4244-1718-6
Type :
conf
DOI :
10.1109/ICIEA.2008.4582753
Filename :
4582753
Link To Document :
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