Three dimensional CMOS devices and integrated circuits

Author

Ieong, Meikei ; Guarini, Kathryn W. ; Chan, Victor ; Bernstein, K. ; Joshi, Rajiv ; Kedzierski, Jakub ; Haensch, Wilfiied

Author_Institution

Microelectron. Div., IBM Corp., Hopewell Junction, NY, USA

fYear

2003

fDate

21-24 Sept. 2003

Firstpage

207

Lastpage

213

Abstract

Three dimensional devices and, integrated circuits are attractive options for overcoming barriers in device and interconnect scaling, offering an opportunity to continue the CMOS performance trend. This paper reviews the process technology and associated design issues in three dimensional devices and integrated circuits.

Keywords

CMOS integrated circuits; MOSFET; integrated circuit design; integrated circuit interconnections; 3D CMOS IC; 3D CMOS devices; CMOS performance trend; CMOS process technology; MOSFET devices; interconnect scaling barriers; CMOS integrated circuits; CMOS technology; Delay; Integrated circuit interconnections; Integrated circuit technology; MOSFET circuits; Microelectronics; Research and development; Silicon on insulator technology; Wires;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003

Print_ISBN

0-7803-7842-3

Type

conf

DOI

10.1109/CICC.2003.1249391

Filename

1249391

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2345388