DocumentCode :
2345536
Title :
A Verilog-A compact model for ESD protection NMOSTs
Author :
Li, Junjun ; Joshi, Sopan ; Rosenbaum, Elyse
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA
fYear :
2003
fDate :
21-24 Sept. 2003
Firstpage :
253
Lastpage :
256
Abstract :
We present a simulator-independent, compact model of the ESD protection NMOST, suitable for circuit-level simulation. The Verilog-A language is used for the model development. Small-signal and large-signal models are provided to ensure accurate ac and transient simulation. Improved avalanche multiplication factor equations are used to avoid convergence problems.
Keywords :
MIS devices; avalanche breakdown; electrostatic discharge; hardware description languages; semiconductor device models; transient response; ESD protection; NMOST; Verilog-A compact model; ac simulation; avalanche multiplication factor equations; large-signal models; small-signal models; transient simulation; Circuit simulation; Computational modeling; Electrostatic discharge; Equations; Hardware design languages; MOS devices; MOSFET circuits; Protection; Semiconductor device modeling; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003
Print_ISBN :
0-7803-7842-3
Type :
conf
DOI :
10.1109/CICC.2003.1249398
Filename :
1249398
Link To Document :
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