Low power direct digital frequency synthesizers in 0.18 μm CMOS

Author

Langlois, J.M.P. ; Al-Khalili, D.

Author_Institution

Dept. of Electr. & Comput. Eng., R. Mil. Coll. of Canada, Kingston, Ont., Canada

fYear

2003

fDate

21-24 Sept. 2003

Firstpage

283

Lastpage

286

Abstract

Two low-power sine-output direct digital frequency synthesizers have been fabricated in 0.18 μm CMOS, tested and characterized. The first IC has a 16-bit phase accumulator and it generates a single phase sinusoidal digital sequence with 60 dBc of spurious free dynamic range. Core power consumption is as low as 15 μW/MHz. The second IC has a 32-bit phase accumulator and it generates quadrature sinusoidal digital sequences with 84 dBc of spurious free dynamic range. Its core consumes as little as 220 μW/MHz. Both ICs employ an efficient linear interpolation scheme for sinusoidal functions, developed by the authors.

Keywords

CMOS integrated circuits; direct digital synthesis; interpolation; low-power electronics; waveform generators; 0.18 micron; 16 bit; 32 bit; CMOS; direct digital frequency synthesizers; linear interpolation; low power DDFS; phase accumulator; quadrature sinusoidal digital sequences; sine-output synthesizers; single phase sinusoidal digital sequence; spurious free dynamic range; Clocks; Digital integrated circuits; Dynamic range; Frequency synthesizers; Interpolation; Military computing; Read only memory; Sequences; Testing; Tuning;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003

Print_ISBN

0-7803-7842-3

Type

conf

DOI

10.1109/CICC.2003.1249404

Filename

1249404