Title :
Techniques for in-band phase noise suppression in re-circulating DLLs
Author :
Ye, Sheng ; Jansson, Lars ; Galton, Ian
Author_Institution :
Univ. of California, USA
Abstract :
This paper presents a re-circulating delay-locked loop (DLL) with various innovations to improve in-band phase noise suppression. The voltage-controlled oscillator (VCO) and bias circuitry incorporate circuit-level techniques that reduce 1/f noise through switched biasing. The phase realignment theory presented in (S. Ye, L. Jansson et al, IEEE Journal of Solid State Circuits, vol.37, no.12, p.1795-1803 (2002)) is applied to optimize the VCO so as to maximize the phase noise suppression achieved by periodically switching in a clean reference pulse, and it is further applied to optimize the loop filter. Theoretical predictions are verified through a 100 MHz prototype IC fabricated in a 0.18 μm CMOS process.
Keywords :
1/f noise; CMOS integrated circuits; delay lock loops; integrated circuit design; integrated circuit noise; phase noise; voltage-controlled oscillators; 0.18 micron; 1/f noise reduction; 100 MHz; CMOS; VCO; bias circuitry; clean reference pulse; delay-locked loop; in-band phase noise suppression; loop filter; phase realignment theory; re-circulating DLL; switched biasing; voltage-controlled oscillator; Circuit noise; Delay; Filters; Noise reduction; Phase noise; Pulse circuits; Solid state circuits; Switching circuits; Technological innovation; Voltage-controlled oscillators;
Conference_Titel :
Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003
Print_ISBN :
0-7803-7842-3
DOI :
10.1109/CICC.2003.1249407
