DocumentCode :
2346610
Title :
A 39.8Gb/s to 43.1Gb/s SFI-5 compliant 16:1 multiplexer and 1:16 demultiplexer for optical communication systems
Author :
Krawczyk, Thomas W. ; Steidl, Samuel A. ; Alexander, Richard ; Pulver, James ; Kowalski, Gary ; Hornbuckle, Craig ; Rowe, David
Author_Institution :
Sierra Monolithics, Inc., Redondo Beach, CA, USA
fYear :
2003
fDate :
21-24 Sept. 2003
Firstpage :
581
Lastpage :
584
Abstract :
A 16:1 multiplexer and 1:16 demultiplexer, designed using a 0.18 μm SiGe BiCMOS process, operates at data rates between 39.8 Gb/s and 43.1 Gb/s. The demultiplexer features an integrated CDR (clock and data recovery) with an input sensitivity of 25 mV at 40 Gb/s and 40 mV at 43 Gb/s. The multiplexer has an integrated CMU (clock multiplier unit) and an output voltage swing of 1 Vp-p differential with 165 fs rms jitter. Both chips are SFI-5 compliant. The multiplexer and demultiplexer dissipate 10 W and 4.7 W of power, respectively, using supply voltages of -3.6 V and 1.2 V (or 1.8 V).
Keywords :
BiCMOS integrated circuits; demultiplexing equipment; frequency multipliers; jitter; multiplexing equipment; optical communication equipment; synchronisation; -3.6 V; 0.18 micron; 1 V; 1.2 V; 1.8 V; 10 W; 25 mV; 39.8 to 43.1 Gbit/s; 4.7 W; 40 Gbit/s; 40 mV; 43 Gbit/s; BiCMOS; SFI-5 compliant multiplexer; SiGe; clock and data recovery; clock multiplier unit; demultiplexer data rate; integrated CDR input sensitivity; integrated CMU; jitter; optical communication systems; Clocks; Germanium silicon alloys; Jitter; Multiplexing; Optical fiber communication; Phase locked loops; Phase noise; Silicon germanium; Voltage; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003
Print_ISBN :
0-7803-7842-3
Type :
conf
DOI :
10.1109/CICC.2003.1249465
Filename :
1249465
Link To Document :
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