DocumentCode :
2346615
Title :
Test structures for the evaluation of Si substrates
Author :
Kokawa, Yoshiko ; Kimura, Mikihiro ; Kume, Morihiko ; Yamamoto, Hidekazu ; Koyama, Hiroshi
Author_Institution :
ULSI Lab., Mitsubishi Electr. Corp., Itami, Japan
fYear :
1995
fDate :
22-25 Mar 1995
Firstpage :
81
Lastpage :
85
Abstract :
The quality of Si substrates affecting the oxide reliability was investigated using various kinds of test structures like flat capacitor, field edge array and gate edge array. The field edge array test structure which resembles the conditions found for a real device is shown to be quite effective to determine the quality of oxides. Oxide grown on a P type epitaxial layer on P+ silicon substrate shows highest reliability in all test structures. Gettering of heavy metals and/or crystal defects by the P+ silicon substrate is the dominant mechanism for the improvement of the oxide reliability
Keywords :
MOS capacitors; elemental semiconductors; getters; semiconductor device reliability; semiconductor device testing; semiconductor technology; silicon; substrates; MOS capacitors; P+ substrates; Si; crystal defects; field edge array; flat capacitor; gate edge array; gettering; oxide reliability; test structures; Annealing; Conductivity; Dielectric substrates; Etching; Gettering; Hydrogen; MOS capacitors; Optical microscopy; Silicon; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 1995. ICMTS 1995. Proceedings of the 1995 International Conference on
Conference_Location :
Nara
Print_ISBN :
0-7803-2065-4
Type :
conf
DOI :
10.1109/ICMTS.1995.513950
Filename :
513950
Link To Document :
بازگشت