DocumentCode :
2346738
Title :
Precise measurement of P-N junction leakage current generated in Si subsurface
Author :
Horikawa, Mitsuhiro ; Mizutani, Takashi ; Noda, Kenji ; Kitano, Tomohisa
Author_Institution :
ULSI Device Dev. Lab., NEC Corp., Sagamihara, Japan
fYear :
1995
fDate :
22-25 Mar 1995
Firstpage :
113
Lastpage :
116
Abstract :
We present a new method of measuring junction leakage current generated only in the subsurface of the silicon substrate. In this method, diffusion current from deep in the bulk silicon is blocked, so the peripheral component of the junction leakage current was measured accurately, even at elevated temperatures. Using this new test device, we concluded that the leakage current generated in a denuded zone of Czochralski-grown Si is as small as that for an epitaxial layer
Keywords :
DRAM chips; MOS memory circuits; electric current measurement; elemental semiconductors; integrated circuit testing; leakage currents; p-n junctions; silicon; substrates; Czochralski-grown material; DRAM chips; P-N junction leakage current; Si; current measurement; denuded zone; diffusion current; peripheral component; substrate subsurface; test device; Current measurement; Epitaxial layers; Laboratories; Leakage current; National electric code; P-n junctions; Pollution measurement; Silicon; Substrates; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 1995. ICMTS 1995. Proceedings of the 1995 International Conference on
Conference_Location :
Nara
Print_ISBN :
0-7803-2065-4
Type :
conf
DOI :
10.1109/ICMTS.1995.513956
Filename :
513956
Link To Document :
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