DocumentCode :
234675
Title :
Memristor-based redundant binary adder
Author :
El-Slehdar, A.A. ; Fouad, A.H. ; Radwan, A.G.
Author_Institution :
NISC Res. Center, Nile Univ., Cairo, Egypt
fYear :
2014
fDate :
19-20 April 2014
Firstpage :
1
Lastpage :
5
Abstract :
This paper introduces a memristor based redundant binary adder for canonic signed digit code, that coding eliminates the carry and provides a carry-free addition. The proposed binary adder circuit tries to achieve high addition speed that is independent on the length of the data using the accumulation property of a Nano-element called a memristor. The general block diagram of the proposed circuit is illustrated based on memristors and its operation has been validated using HP memristor model and simulated via different examples using PSPICE showing a great match.
Keywords :
adders; integrated circuit modelling; memristor circuits; HP memristor model; PSPICE; addition speed; canonic signed digit code; nanoelement; redundant binary adder; Adders; Generators; Integrated circuit modeling; Memristors; Oscillators; Simulation; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Engineering and Technology (ICET), 2014 International Conference on
Conference_Location :
Cairo
Type :
conf
DOI :
10.1109/ICEngTechnol.2014.7016820
Filename :
7016820
Link To Document :
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