Title :
On-chip measurement of interconnect capacitances in a CMOS process
Author :
Khalkhal, A. ; Nouet, P.
Author_Institution :
LIRMM, Univ. des Sci. et Tech. du Languedoc, Montpellier, France
Abstract :
A new Test Structure for measurement of small constant capacitances is presented. As compared to previously published methods, improvements are obtained in the field of accuracy and resolution. No reference elements are used and the calculated capacitance is free of parasitic capacitance influence. Moreover, the Test Structure occupies a small area. It is particularly suitable for spatial scattering studies and for modelling of small dimension interconnect capacitances
Keywords :
CMOS integrated circuits; capacitance measurement; integrated circuit interconnections; integrated circuit measurement; integrated circuit testing; CMOS process; interconnect capacitances; on-chip measurement; spatial scattering; test structure; Area measurement; CMOS process; Capacitance measurement; Circuit testing; Integrated circuit interconnections; Inverters; Parasitic capacitance; Scattering; Semiconductor device modeling; Silicon;
Conference_Titel :
Microelectronic Test Structures, 1995. ICMTS 1995. Proceedings of the 1995 International Conference on
Conference_Location :
Nara
Print_ISBN :
0-7803-2065-4
DOI :
10.1109/ICMTS.1995.513962
