DocumentCode :
2346855
Title :
A high-speed and low-voltage associative co-processor with Hamming distance ordering using word-parallel and hierarchical search architecture
Author :
Oike, Yusuke ; Ikeda, Makoto ; Asada, Kunihiro
Author_Institution :
Dept. of Electron. Eng., Univ. of Tokyo, Japan
fYear :
2003
fDate :
21-24 Sept. 2003
Firstpage :
643
Lastpage :
646
Abstract :
We present a new concept and its circuit implementation for a high-speed and low-voltage associative co-processor with Hamming distance ordering. A hierarchical search architecture keeps high speed in large input number. Our circuit implementation allows unlimited data base capacity and achieves low-voltage operation under 1.0 V for SoC applications, which are difficult for the conventional analog approaches. The search logic embedded in a memory cell realizes word-parallel Hamming distance ordering for high-speed sorting/routing applications as well as near/nearest-match detection for recognition. Our fabricated 0.18 μm 64-bit 32-word associative co-processor operates at 411.5 MHz and 40.0 MHz at 1.8 V and 0.75 V respectively.
Keywords :
CMOS digital integrated circuits; content-addressable storage; coprocessors; low-power electronics; parallel processing; system-on-chip; 0.18 micron; 0.75 V; 1.8 V; 40.0 MHz; 411.5 MHz; 64 bit; CMOS; SoC applications; hierarchical search architecture; high-speed co-processor; low-voltage associative co-processor; memory cell embedded search logic; near/nearest-match detection; recognition; sorting/routing applications; unlimited data base capacity; word-parallel Hamming distance ordering; Cams; Circuits; Clocks; Coprocessors; Design engineering; Hamming distance; High definition video; Routing; Sorting; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003
Print_ISBN :
0-7803-7842-3
Type :
conf
DOI :
10.1109/CICC.2003.1249478
Filename :
1249478
Link To Document :
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