Title :
A new extraction method for unit bipolar junction transistor capacitance parameters
Author :
Gambetta, N. ; Cialdella, B. ; Celi, D. ; Depey, M.
Author_Institution :
Central R&D, SGS-Thomson Microelectron., Crolles, France
Abstract :
A new method for extracting the area, peripheral and corner capacitance components of bipolar junction transistor, using measurements versus bias on a number of different structures is presented and validated. The same model with different parameters is used for the three components. Validation has been made using a quasi-2D simulator. Finally, it is shown that this method gives accurate results regarding the goodness of fit
Keywords :
bipolar transistors; capacitance; semiconductor device models; area capacitance; bipolar junction transistor; corner capacitance; extraction method; goodness of fit; peripheral capacitance; quasi-2D simulator; transistor models; Area measurement; Capacitance measurement; Data mining; Frequency measurement; Linear predictive coding; Microelectronics; Parasitic capacitance; Research and development; Semiconductor process modeling; Voltage;
Conference_Titel :
Microelectronic Test Structures, 1995. ICMTS 1995. Proceedings of the 1995 International Conference on
Conference_Location :
Nara
Print_ISBN :
0-7803-2065-4
DOI :
10.1109/ICMTS.1995.513965
