Title :
Characterization and modeling of MOS mismatch in analog CMOS technology
Author :
Wong, Shyh-Chyi ; Ting, Jyh-Kang ; Hsu, Shun-Liang
Author_Institution :
Taiwan Semicond. Manuf. Co. Ltd., Hsinchu, Taiwan
Abstract :
This paper studies the mismatch characteristics in CMOS technology for precision analog design. Mismatch of MOS devices is investigated. The impact of layout-configuration and device-size are characterized. For clean mismatch measurement, a differential method of extracting mismatch parameters is developed. An empirical model is further proposed for simulating mismatch behavior in SPICE
Keywords :
CMOS analogue integrated circuits; integrated circuit layout; integrated circuit measurement; integrated circuit modelling; integrated circuit testing; MOS mismatch; SPICE; analog CMOS technology; device-size; empirical model; layout-configuration; mismatch parameters extraction; test methodology; test structure; Area measurement; CMOS technology; Electrical resistance measurement; Immune system; MOS devices; Noise measurement; Semiconductor device modeling; Testing; Threshold voltage; Transconductance;
Conference_Titel :
Microelectronic Test Structures, 1995. ICMTS 1995. Proceedings of the 1995 International Conference on
Conference_Location :
Nara
Print_ISBN :
0-7803-2065-4
DOI :
10.1109/ICMTS.1995.513967
