Title :
A feasibility study of 2.5D system integration
Author :
Deng, Yangdong ; Maly, Wojciech
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
Excessive on-chip wire length and fast increasing fabrication cost have been the main factors impairing the effectiveness of monolithic integration of VLSI systems. To address these problems, this paper investigates a die stacking based system integration scheme (2.5D system integration). We performed a series of design case studies and developed layout design tools for this new scheme. Our results show that this new scheme has a potential to outperform its monolithic equivalent.
Keywords :
VLSI; integrated circuit design; integrated circuit interconnections; integrated circuit packaging; multichip modules; 2.5D system integration; VLSI monolithic integration; die stacking; layout design tools; on-chip wire length; Costs; Delay; Fabrication; Integrated circuit interconnections; Logic design; Modems; Stacking; System-on-a-chip; Very large scale integration; Wire;
Conference_Titel :
Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003
Print_ISBN :
0-7803-7842-3
DOI :
10.1109/CICC.2003.1249483
