Switching noise reduction techniques for switched-capacitor voltage doubler

Switching noise reduction techniques for integrated switched-capacitor cross-coupled voltage doublers, which use a break-before-make mechanism and have an increase of resistance of the serial power transistors during turn-on, are presented in this paper. Implemented in a 0.6-μm CMOS process, experimental results show that the switching noise of the voltage doubler is reduced by at least 3 times. The quiescent power dissipation of the proposed doubler is reduced by 2 times at 2.5-V supply voltage and 500-kHz switching frequency compared to the conventional counterpart.