DocumentCode :
2347104
Title :
Reduction of short channel effects in SOI MOSFETs with 35 nm channel width and 70 nm channel length
Author :
Leobandung, E. ; Chou, S.Y.
Author_Institution :
Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA
fYear :
1996
fDate :
26-26 June 1996
Firstpage :
110
Lastpage :
111
Abstract :
We report the fabrication and characterization of SOI NMOSFETs with channel width as narrow as 35 nm. For the first time, it is observed that using a narrow channel width, the short channel effects in SOI MOSFETs can be significantly reduced because the gate wrapped around the narrow channel side wall allowing a better gate control in horizontal and vertical direction. With a 35 nm channel width, we are able to realize well-behaved SOI NMOSFETs with effective channel length of 70 nm.
Keywords :
MOSFET; silicon-on-insulator; 35 nm; 70 nm; NMOSFET; SOI MOSFET; fabrication; gate control; short channel effect; Annealing; Doping; Electrodes; Fabrication; Lithography; MOSFETs; Oxidation; Silicon; Threshold voltage; Wet etching;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Device Research Conference, 1996. Digest. 54th Annual
Conference_Location :
Santa Barbara, CA, USA
Print_ISBN :
0-7803-3358-6
Type :
conf
DOI :
10.1109/DRC.1996.546334
Filename :
546334
Link To Document :
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