Evidence of a correlation between process yields and reliability data for a rad-hard SOI technology

A methodology for wafer level reliability prediction is described. Accelerated lifetests performed on specifically designed test structures allowed us to correlate reliability with elementary process yields. These elementary yields were extracted for each test structure (which characterizes a process step) from data obtained after wafer level tests. The wafer “peripheral” area, on which was detected a significant number of clustered defects at wafer level, presented few failures during the accelerated lifetest, showing that the geographical origin of the devices does not significantly affect the reliability