DocumentCode
2347329
Title
Wafer mapping using DOE and RSM techniques
Author
Walton, Anthony J. ; Fallon, Martin ; Wilson, Dave
Author_Institution
Dept. of Electr. Eng., Edinburgh Univ., UK
fYear
1995
fDate
22-25 Mar 1995
Firstpage
289
Lastpage
294
Abstract
This paper applies classical DOE techniques to the the selection of measurement points for wafer mapping. RSM is used to generate the contour plots and it is shown that in many cases transformations can be used to improve the accuracy of wafer maps
Keywords
design of experiments; integrated circuit measurement; monolithic integrated circuits; statistical analysis; DOE techniques; RSM techniques; contour plots; design of experiment; measurement points; response surface methodology; transformations; wafer mapping; Design for experiments; Distortion measurement; Equations; Position measurement; Radiofrequency interference; Response surface methodology; Sampling methods; Semiconductor device modeling; Surface fitting; US Department of Energy;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 1995. ICMTS 1995. Proceedings of the 1995 International Conference on
Conference_Location
Nara
Print_ISBN
0-7803-2065-4
Type
conf
DOI
10.1109/ICMTS.1995.513989
Filename
513989
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