DocumentCode :
2347864
Title :
IDDQ data analysis using current signature
Author :
Li, James C M ; McCluskey, Edward J.
Author_Institution :
Center for Reliable Comput., Stanford Univ., CA, USA
fYear :
1998
fDate :
12-13 Nov 1998
Firstpage :
37
Lastpage :
42
Abstract :
The goals of this paper are (1) to improve the effectiveness of IDDQ testing, and (2) to find the characteristic current signature for every defect class. Current signature analysis was performed for the IDDQ data collected on the Murphy test chip. A “total variance” method is proposed to reduce the test escape of IDDQ testing. Compared to the other three IDDQ testing methods, it has the lowest test escape and the highest yield loss. However, there are still 7.5% non-functional CUTs which could not be detected by any IDDQ testing method. This result shows that it is not possible to replace Boolean tests by IDDQ testing. The distributions of six current signature types over six different classes are analyzed. The results show that “big-step” is the dominant signature type among all defect classes
Keywords :
data analysis; digital integrated circuits; integrated circuit testing; logic testing; CUT classification; IDDQ data analysis; IDDQ testing; Murphy test chip; current signature analysis; defect classes; total variance method; Assembly systems; CMOS logic circuits; Data analysis; Large scale integration; Logic arrays; Logic testing; Performance analysis; Performance evaluation; System testing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
IDDQ Testing, 1998. Proceedings. 1998 IEEE International Workshop on
Conference_Location :
San Jose, CA
Print_ISBN :
0-8186-9191-3
Type :
conf
DOI :
10.1109/IDDQ.1998.730730
Filename :
730730
Link To Document :
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