Computer-aided inspection of some design rules of integrated circuit layers

Author

Doudkin, A.A. ; Vershok, D.A.

Author_Institution

Lab. of Syst. Identification, United Inst. of Informatics Problems of the Nat. Acad. of Sci. of Belarus, Minsk

fYear

2003

fDate

8-10 Sept. 2003

Firstpage

232

Lastpage

235

Abstract

The visual inspection algorithms for verification of industrial design rules of integrated circuits are proposed. The algorithms include segmentation of images of layout with subsequent extraction of typical patterns on these images for defects localization. The unique feature of the technology is that the inspection of the design technological rules is performed at different stages of processing. Thus a time-consuming procedure of image matching with the purpose of localization of defects is performed only for some images from the whole image set. The inspection algorithms are included in the system of metallization layers processing, which is applied both for layout reconstruction of integrated circuits and for the inspection of its manufacture

Keywords

electronic design automation; image matching; image segmentation; inspection; integrated circuit metallisation; defects localization; image processing; image segmentation; integrated circuit layout reconstruction; integrated circuits design rule verification; metallization layers processing; visual inspection algorithm; Algorithm design and analysis; Image matching; Image reconstruction; Image segmentation; Inspection; Integrated circuit layout; Integrated circuit manufacture; Integrated circuit metallization; Integrated circuit technology; Manufacturing processes;

fLanguage

English

Publisher

ieee

Conference_Titel

Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2003. Proceedings of the Second IEEE International Workshop on

Conference_Location

Lviv

Print_ISBN

0-7803-8138-6

Type

conf

DOI

10.1109/IDAACS.2003.1249556

Filename

1249556