100 MHz IDDQ sensor design with 1 μA resolution for BIST applications

Author

Antonioli, Yann ; Kinoshita, Kozo ; Nishikawa, Shigeki ; Uemura, Hiroshi

Author_Institution

Osaka Univ., Japan

fYear

1998

fDate

12-13 Nov 1998

Firstpage

64

Lastpage

68

Abstract

This paper presents a high-speed high-resolution I_DDQ (power supply quiescent current) sensor design for BIST (built-in self test) applications. The voltage drop is amplified before comparison with a reference voltage to improve sensing resolution. For various CUTs (Circuits Under Test) including Iscas circuits, Spice simulations show speeds up to 100 MHz. A resolution better than 1 μA is achieved while the voltage drop is kept under 0.3 V

Keywords

CMOS digital integrated circuits; automatic testing; built-in self test; circuit simulation; electric sensing devices; fault diagnosis; integrated circuit testing; leakage currents; 100 MHz; BIST applications; CMOS digital circuits; CUTs; IDDQ sensor design; Iscas circuits; Spice simulations; fault diagnosis; leakage currents; power supply quiescent current; reference voltage; resolution; sensing resolution; voltage drop; Built-in self-test; CMOS process; Circuits; Diodes; Energy consumption; Inverters; Manufacturing processes; Power supplies; Threshold voltage; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

IDDQ Testing, 1998. Proceedings. 1998 IEEE International Workshop on

Conference_Location

San Jose, CA

Print_ISBN

0-8186-9191-3

Type

conf

DOI

10.1109/IDDQ.1998.730767

Filename

730767