DocumentCode :
2348341
Title :
Adaptive priority toggle asynchronous tree arbiter for AER-based image sensor
Author :
Linn, Aung Myat Thu ; Tuan, Do Anh ; Shoushun, Chen ; Seng, Yeo Kiat
Author_Institution :
VIRTUS IC Design Centre of Excellence, Nanyang Technol. Univ., Singapore, Singapore
fYear :
2011
fDate :
3-5 Oct. 2011
Firstpage :
66
Lastpage :
71
Abstract :
In this paper, we reported an adaptive priority toggle asynchronous tree arbiter for Address Event Representation (AER)-based image sensors. Simultaneous requests from event-triggered pixels, event latency, timing error and jitter are the inherent issues in AER-based read-out circuits. Fixed priority arbiter often results in unfair allocation of bus resource to only “privileged” pixels thus resulting in timing error. The proposed arbiter is able to reduce the timing error by toggling the requests priority during simultaneous requests. This also achieves the fair allocation of bus resource to all pixels. The featured eager propagation scheme allows the requests to propagate towards higher hierarchy in the tree during the arbitration process. As a result, latency and jitter problems can be reduced. Simulation result reveals that single event delay for 128-way tree arbiter is 4.2 ns and therefore, for 128 × 128 array, such arbiter can process up to 238.09M event/s which is more than 15 times faster than the speed of the reported AER sensor. The arbiter layout was realized with 2P4M 0.35μm CMOS process with a silicon area of 78 × 18μm2 and had been implemented in 80 × 80 array AER temporal contrast sensor.
Keywords :
CMOS image sensors; jitter; readout electronics; AER temporal contrast sensor; AER-based image sensor; CMOS process; adaptive priority toggle asynchronous tree arbiter; address event representation; bus resource; event latency; event-triggered pixels; jitter; silicon area; size 0.35 mum; timing error; Arrays; Delay; Image sensors; Logic gates; Resource management; Simulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI and System-on-Chip (VLSI-SoC), 2011 IEEE/IFIP 19th International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4577-0171-9
Electronic_ISBN :
978-1-4577-0169-6
Type :
conf
DOI :
10.1109/VLSISoC.2011.6081631
Filename :
6081631
Link To Document :
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