DocumentCode
2348562
Title
A New Architecture for Radix-2 DHT
Author
Shah, Gautam A. ; Rathore, Tejmal S.
Author_Institution
Dept. of Electron. & Telecommun., Mumbai Univ., Mumbai, India
fYear
2010
fDate
26-28 Nov. 2010
Firstpage
539
Lastpage
543
Abstract
This paper proposes a new architecture for radix-2 DHT. In the known algorithms, the stage structures perform all the additions and multiplications. The proposed algorithm introduces multiplying structures which perform all the multiplications with the cosine coefficients and their related additions. This leads to i) simplification of the stage structures which now have to perform only the additions, and ii) a reduction in the number of multiplications without affecting the total number of additions. A new architecture utilizing current feedback operational amplifiers which implements the proposed algorithm in hardware has been proposed. The architecture has been tested by simulating it with the help of Orcad PSpice.
Keywords
discrete Hartley transforms; feedback amplifiers; operational amplifiers; Orcad PSpice; cosine coefficients; current feedback operational amplifiers; discrete Hartley transform; multiplying structures; radix-2 DHT; Analog architecture; decimation-in-frequency; decimation-in-time; discrete Hartley transform; radix-2;
fLanguage
English
Publisher
ieee
Conference_Titel
Computational Intelligence and Communication Networks (CICN), 2010 International Conference on
Conference_Location
Bhopal
Print_ISBN
978-1-4244-8653-3
Electronic_ISBN
978-0-7695-4254-6
Type
conf
DOI
10.1109/CICN.2010.106
Filename
5702029
Link To Document