DocumentCode
2348755
Title
FPGA implementation of high sampling rate in-car non-stationary noise cancellation based on adaptive Wiener filter
Author
Jheng, Hong-Yuan ; Chen, Yen-Hsiang ; Ruan, Shanq-Jang ; Ziming Qi
Author_Institution
Dept. of Electron. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei, Taiwan
fYear
2011
fDate
3-5 Oct. 2011
Firstpage
114
Lastpage
117
Abstract
This paper presents the architecture and implementation of a real-time adaptive Wiener filter for non-stationary noise cancellation in a car environment. The Wiener filter has been implemented in a Xilinx Virtex-5 chip and the target device is chosen as xc5vlx110t. The proposed design can filter each 32 samples within 918 micro seconds. The peak sampling rate is estimated to be 88.6KHz. The performance of proposed design is measured as 15.85dB noise reduction.
Keywords
Wiener filters; adaptive filters; field programmable gate arrays; signal denoising; FPGA implementation; Xilinx Virtex-5 chip; frequency 88.6 kHz; high sampling rate in-car non-stationary noise cancellation; real-time adaptive Wiener filter; time 918 mus; Art; Field programmable gate arrays; Matrix decomposition; Navigation; Pipelines; Real time systems; Signal to noise ratio;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI and System-on-Chip (VLSI-SoC), 2011 IEEE/IFIP 19th International Conference on
Conference_Location
Hong Kong
Print_ISBN
978-1-4577-0171-9
Electronic_ISBN
978-1-4577-0169-6
Type
conf
DOI
10.1109/VLSISoC.2011.6081652
Filename
6081652
Link To Document