DocumentCode
2349036
Title
First demonstration of GaAs on insulator (GOI) technology
Author
Parikh, P. ; Chavarkar, P. ; Mishra, U.
Author_Institution
California Univ., Santa Barbara, CA, USA
fYear
1996
fDate
26-26 June 1996
Firstpage
134
Lastpage
135
Abstract
Summary form only given. There is increased interest in the steam oxidation of AlAs, following the pioneering work done at University of Illinois. We report the first demonstration of GaAs On Insulator (GOI) technology using Al/sub 2/O/sub 3/ formed by the steam oxidation of AlAs as the buffer insulator. 500 /spl Aring/ of AlAs was grown on a GaAs buffer, followed by a 100 /spl Aring/ spacer (Al/sub 0.3/GaAs), 2000 /spl Aring/ channel (n-GaAs), 30 /spl Aring/ etch stop (Al/sub 0.7/GaAs) and the 200 /spl Aring/ n/sup +/ ohmic layer for contacts (InAs-GaAs superlattice). The three-terminal DC I-V characteristics of a GOI MESFET indicate that the device has negligible output conductance. The peak g/sub m/ is over 180 mS/mm at a drain current level of 320 mA/mm. The source and drain ohmic contact resistance is 0.2 /spl Omega/-mm and the knee voltage is about 1.2 volts. The f/sub T/ and f/sub max/ of this device are 9 GHz (which is close to the expected value for a 1.5 /spl mu/m gatelength device) and 44 GHz respectively. These results indicate that Al/sub 2/O/sub 3/ is a possible buffer layer insulator for III-V based FET technology and can form an enabling technology for a low substrate leakage, high output resistance GOI FETs, attractive for low power electronics.
Keywords
III-V semiconductors; MESFET integrated circuits; Schottky gate field effect transistors; alumina; field effect MMIC; gallium arsenide; integrated circuit technology; leakage currents; microwave field effect transistors; oxidation; semiconductor-insulator boundaries; 0.2 ohmmm; 1.2 V; 180 mS/mm; 44 GHz; 9 GHz; Al/sub 0.3/GaAs; Al/sub 0.3/GaAs spacer; Al/sub 0.7/GaAs; Al/sub 0.7/GaAs etch stop; Al/sub 2/O/sub 3/ buffer insulator; AlAs; GOI MESFET; GOI technology; GaAs buffer; GaAs on insulator technology; GaAs-Al/sub 2/O/sub 3/-AlAs; III-V based FET technology; InAs-GaAs; InAs-GaAs superlattice; low power electronics; low substrate leakage; n-GaAs channel; n/sup +/ ohmic layer; output conductance; steam oxidation; three-terminal DC I-V characteristics; Contact resistance; Etching; FETs; Gallium arsenide; Insulation; MESFETs; Ohmic contacts; Oxidation; Space technology; Superlattices;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference, 1996. Digest. 54th Annual
Conference_Location
Santa Barbara, CA, USA
Print_ISBN
0-7803-3358-6
Type
conf
DOI
10.1109/DRC.1996.546344
Filename
546344
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